![]() ![]() ![]() PCI9080RDK-RC32364 Reference Design Kit With Pci SDK PCI9080RDK-860 Reference Design Kits With Pci SDK For The Pci 9080 PCI9080RDK-401B Reference Design Kit With Pci SDK PCI9080RDK-401 Reference Design Kits With Pci SDK For The Pci 9080 It Incorporates All The Features of The Pci 9060 Family of Pci Products, While Adding The Options And Features Needed to Keep Ahead of The Ever PCI9080 The Pci 9080 Master Chip is The Standard in Pci I/o Accelerators. PCI9060 The Pci 9060 Family Was The First Full Featured Pci Interface Chip on The Market And Was Recognized as The Industry Standard For Pci Interface Devices. PCI9054RDK-LITE Pci Bus Master Prototyping Kit PCI9054RDK-860 Reference Design Kit With Pci SDK PCI9054 The Pci 9054 is a Next Generation 32-bit Pci Bus Mastering Interface Chip That Seamlessly Connects to And Takes Full Advantage of Motorola's MPC860 Powerquicc And MPC850 Microprocessors. 47 */ 48typedef struct port_t ħ7 u8 _iomem * rambase /* buffer memory base (virtual) */ 78 u8 _iomem * scabase /* SCA memory base (virtual) */ 79 plx9052 _iomem * plxbase /* PLX registers memory base (virtual) */ 80 u16 rx_ring_buffers /* number of buffers in a ring */ 81 u16 tx_ring_buffers Ĩ2 u16 buff_offset /* offset of first buffer of first channel */ 83 u8 irq /* interrupt request level */ 84 85 port_t ports Ĩ7 88#define get_port( card, port) (&( card)-> ports)Ĩ9#define sca_flush( card) ( sca_in( IER0, card))ĩ0 91static inline void new_memcpy_toio(char _iomem * dest, char * src, int length)ġ04 105#undef memcpy_toio 106#define memcpy_toio new_memcpy_toio 107 108#include " hd64572.c"ġ09 110static void pci200_set_iface( port_t * port)ġ16 117 sca_out( EXS_TES1, ( port-> chan ? MSCI1_OFFSET : MSCI0_OFFSET) + EXS,ġ19 switch ( port-> settings.Some Part number from the same manufacture PLX Technology, Inc. 46 * This structure can be used to access 9052 registers (memory mapped). ![]() ![]() PCI9052 Data Book 12 */ 13 14#define pr_fmt( fmt) KBUILD_MODNAME ": " fmt 15 16#include ģ4 35#undef DEBUG_PKT 36#define DEBUG_RINGS 37 38#define PCI200SYN_PLX_SIZE 0x80 /* PLX control window size (128b) */ 39#define PCI200SYN_SCA_SIZE 0x400 /* SCA window size (1Kb) */ 40#define MAX_TX_BUFFERS 10Ĥ1 42static int pci_clock_freq = 33000000 Ĥ3#define CLOCK_BASE pci_clock_freq 44 45 /* PLX PCI9052 local configuration and shared runtime registers. 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Goramo PCI200SYN synchronous serial card driver for Linux 4 * 5 * Copyright (C) 2002-2008 Krzysztof Halasa 6 * 7 * For information see 8 * 9 * Sources of information: 10 * Hitachi HD64572 SCA-II User's Manual 11 * PLX Technology Inc. ![]()
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